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Changed IADD_RS to use mod.mem

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This commit is contained in:
tevador
2019-04-27 23:52:26 +02:00
parent ff88a57a98
commit fd7186f873
8 changed files with 43 additions and 47 deletions
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src/assembly_generator_x86.cpp
+5 -6
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@@ -71,7 +71,7 @@ namespace randomx {
asmCode << "xor " << regR[instr.dst] << ", " << regR[instr.src] << std::endl;
break;
case SuperscalarInstructionType::IADD_RS:
asmCode << "lea " << regR[instr.dst] << ", [" << regR[instr.dst] << "+" << regR[instr.src] << "*" << (1 << (instr.getModShift2())) << "]" << std::endl;
asmCode << "lea " << regR[instr.dst] << ", [" << regR[instr.dst] << "+" << regR[instr.src] << "*" << (1 << (instr.getModMem())) << "]" << std::endl;
break;
case SuperscalarInstructionType::IMUL_R:
asmCode << "imul " << regR[instr.dst] << ", " << regR[instr.src] << std::endl;
@@ -180,7 +180,7 @@ namespace randomx {
asmCode << regR[instr.dst] << " ^= " << regR[instr.src] << ";" << std::endl;
break;
case SuperscalarInstructionType::IADD_RS:
asmCode << regR[instr.dst] << " += " << regR[instr.src] << "*" << (1 << (instr.getModShift2())) << ";" << std::endl;
asmCode << regR[instr.dst] << " += " << regR[instr.src] << "*" << (1 << (instr.getModMem())) << ";" << std::endl;
break;
case SuperscalarInstructionType::IMUL_R:
asmCode << regR[instr.dst] << " *= " << regR[instr.src] << ";" << std::endl;
@@ -275,9 +275,9 @@ namespace randomx {
void AssemblyGeneratorX86::h_IADD_RS(Instruction& instr, int i) {
registerUsage[instr.dst] = i;
if(instr.dst == RegisterNeedsDisplacement)
asmCode << "\tlea " << regR[instr.dst] << ", [" << regR[instr.dst] << "+" << regR[instr.src] << "*" << (1 << (instr.getModShift2())) << std::showpos << (int32_t)instr.getImm32() << std::noshowpos << "]" << std::endl;
asmCode << "\tlea " << regR[instr.dst] << ", [" << regR[instr.dst] << "+" << regR[instr.src] << "*" << (1 << (instr.getModMem())) << std::showpos << (int32_t)instr.getImm32() << std::noshowpos << "]" << std::endl;
else
asmCode << "\tlea " << regR[instr.dst] << ", [" << regR[instr.dst] << "+" << regR[instr.src] << "*" << (1 << (instr.getModShift2())) << "]" << std::endl;
asmCode << "\tlea " << regR[instr.dst] << ", [" << regR[instr.dst] << "+" << regR[instr.src] << "*" << (1 << (instr.getModMem())) << "]" << std::endl;
traceint(instr);
}
@@ -442,7 +442,6 @@ namespace randomx {
void AssemblyGeneratorX86::h_IMUL_RCP(Instruction& instr, int i) {
if (instr.getImm32() != 0) {
registerUsage[instr.dst] = i;
uint32_t divisor = instr.getImm32();
asmCode << "\tmov rax, " << randomx_reciprocal(instr.getImm32()) << std::endl;
asmCode << "\timul " << regR[instr.dst] << ", rax" << std::endl;
traceint(instr);
@@ -566,7 +565,7 @@ namespace randomx {
}
void AssemblyGeneratorX86::handleCondition(Instruction& instr, int i) {
const int shift = instr.getModShift3();
const int shift = instr.getModShift();
const int conditionMask = ((1 << RANDOMX_CONDITION_BITS) - 1) << shift;
int reg = getConditionRegister();
int target = registerUsage[reg] + 1;
src/configuration.h
+1 -1
View File
@@ -31,7 +31,7 @@ along with RandomX. If not, see<http://www.gnu.org/licenses/>.
//Argon2d salt
#define RANDOMX_ARGON_SALT "RandomX\x03"
//Number of random Cache accesses per Dataset block. Minimum is 2.
//Number of random Cache accesses per Dataset item. Minimum is 2.
#define RANDOMX_CACHE_ACCESSES 8
#define RANDOMX_SUPERSCALAR_LATENCY 170
src/instruction.hpp
+4 -7
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@@ -78,16 +78,13 @@ namespace randomx {
return os;
}
int getModMem() const {
return mod % 4;
return mod % 4; //bits 0-1
}
int getModCond() const {
return (mod >> 2) & 7;
return (mod >> 2) % 8; //bits 2-4
}
int getModShift3() const {
return mod >> 5;
}
int getModShift2() const {
return mod >> 6;
int getModShift() const {
return mod >> 5; //bits 5-7
}
void setMod(uint8_t val) {
mod = val;
src/jit_compiler_x86.cpp
+3 -3
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@@ -357,7 +357,7 @@ namespace randomx {
case randomx::SuperscalarInstructionType::IADD_RS:
emit(REX_LEA);
emitByte(0x04 + 8 * instr.dst);
genSIB(instr.getModShift2(), instr.src, instr.dst);
genSIB(instr.getModMem(), instr.src, instr.dst);
break;
case randomx::SuperscalarInstructionType::IMUL_R:
emit(REX_IMUL_RR);
@@ -481,7 +481,7 @@ namespace randomx {
emitByte(0xac);
else
emitByte(0x04 + 8 * instr.dst);
genSIB(instr.getModShift2(), instr.src, instr.dst);
genSIB(instr.getModMem(), instr.src, instr.dst);
if (instr.dst == RegisterNeedsDisplacement)
emit32(instr.getImm32());
}
@@ -882,7 +882,7 @@ namespace randomx {
}
void JitCompilerX86::handleCondition(Instruction& instr, int i) {
const int shift = instr.getModShift3();
const int shift = instr.getModShift();
const int conditionMask = ((1 << RANDOMX_CONDITION_BITS) - 1) << shift;
int reg = getConditionRegister();
int target = registerUsage[reg] + 1;
src/superscalar.cpp
+1 -1
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@@ -849,7 +849,7 @@ namespace randomx {
r[instr.dst] ^= r[instr.src];
break;
case randomx::SuperscalarInstructionType::IADD_RS:
r[instr.dst] += r[instr.src] << instr.getModShift2();
r[instr.dst] += r[instr.src] << instr.getModMem();
break;
case randomx::SuperscalarInstructionType::IMUL_R:
r[instr.dst] *= r[instr.src];
src/tests/benchmark.cpp
+1 -1
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@@ -225,7 +225,7 @@ int main(int argc, char** argv) {
std::cout << "Calculated result: ";
result.print(std::cout);
if (noncesCount == 1000 && seedValue == 0)
std::cout << "Reference result: 918a8bc3ce0e537eec9d3c5e1a8bb3204ae3954f14c50c14810b38e49588a9e0" << std::endl;
std::cout << "Reference result: 89336a85bf6d1e83eb20fbc92170705ded9b42285b30178ed8e855d65c4c4b69" << std::endl;
if (!miningMode) {
std::cout << "Performance: " << 1000 * elapsed / noncesCount << " ms per hash" << std::endl;
}
src/vm_interpreted.cpp
+3 -3
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@@ -434,12 +434,12 @@ namespace randomx {
ibc.idst = &r[dst];
if (dst != RegisterNeedsDisplacement) {
ibc.isrc = &r[src];
ibc.shift = instr.getModShift2();
ibc.shift = instr.getModMem();
ibc.imm = 0;
}
else {
ibc.isrc = &r[src];
ibc.shift = instr.getModShift2();
ibc.shift = instr.getModMem();
ibc.imm = signExtend2sCompl(instr.getImm32());
}
registerUsage[instr.dst] = i;
@@ -763,7 +763,7 @@ namespace randomx {
//jump condition
int reg = getConditionRegister(registerUsage);
ibc.target = registerUsage[reg];
ibc.shift = instr.getModShift3();
ibc.shift = instr.getModShift();
ibc.creg = &r[reg];
for (unsigned j = 0; j < 8; ++j) { //mark all registers as used
registerUsage[j] = i;