mirror of
https://github.com/wownero/RandomX.git
synced 2026-10-18 16:01:40 +02:00
Reworked SuperscalarHash instruction set
ASM and C code generator for SuperscalarHash Support for Superscalar hash in the light mode
This commit is contained in:
tevador
+115
-161
@@ -29,23 +29,6 @@ along with RandomX. If not, see<http://www.gnu.org/licenses/>.
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#include "LightProgramGenerator.hpp"
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namespace RandomX {
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// Intel Ivy Bridge reference
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namespace LightInstructionType { //uOPs (decode) execution ports latency code size
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constexpr int IADD_RS = 0; //1 p01 1 4
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constexpr int ISUB_R = 1; //1 p015 1 3
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constexpr int ISUB_C = 2; //1 p015 3 7
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constexpr int IMUL_R = 3; //1 p1 3 4
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constexpr int IMUL_C = 4; //1 p1 3 7
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constexpr int IMULH_R = 5; //1+2+1 0+(p1,p5)+0 3 3+3+3
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constexpr int ISMULH_R = 6; //1+2+1 0+(p1,p5)+0 3 3+3+3
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constexpr int IMUL_RCP = 7; //1+1 p015+p1 4 10+4
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constexpr int IXOR_R = 8; //1 p015 1 3
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constexpr int IXOR_C = 9; //1 p015 1 7
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constexpr int IROR_R = 10; //1+2 0+(p0,p5) 1 3+3
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constexpr int IROR_C = 11; //1 p05 1 4
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constexpr int COND_R = 12; //1+1+1+1+1+1 p015+p5+0+p015+p05+p015 3 7+13+3+7+3+3
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constexpr int COUNT = 13;
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}
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namespace LightInstructionOpcode {
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constexpr int IADD_RS = 0;
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@@ -62,7 +45,7 @@ namespace RandomX {
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}
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static bool isMul(int type) {
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return type == LightInstructionType::IMUL_R || type == LightInstructionType::IMUL_C || type == LightInstructionType::IMULH_R || type == LightInstructionType::ISMULH_R || type == LightInstructionType::IMUL_RCP;
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return type == LightInstructionType::IMUL_R || type == LightInstructionType::IMULH_R || type == LightInstructionType::ISMULH_R || type == LightInstructionType::IMUL_RCP;
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}
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const int lightInstructionOpcode[] = {
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@@ -289,19 +272,20 @@ namespace RandomX {
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int getSrcOp() const {
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return srcOp_;
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}
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static const LightInstructionInfo IADD_RS;
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static const LightInstructionInfo ISUB_R;
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static const LightInstructionInfo ISUB_C;
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static const LightInstructionInfo IXOR_R;
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static const LightInstructionInfo IADD_RS;
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static const LightInstructionInfo IMUL_R;
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static const LightInstructionInfo IMUL_C;
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static const LightInstructionInfo IROR_C;
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static const LightInstructionInfo IADD_C7;
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static const LightInstructionInfo IXOR_C7;
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static const LightInstructionInfo IADD_C8;
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static const LightInstructionInfo IXOR_C8;
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static const LightInstructionInfo IADD_C9;
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static const LightInstructionInfo IXOR_C9;
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static const LightInstructionInfo IMULH_R;
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static const LightInstructionInfo ISMULH_R;
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static const LightInstructionInfo IMUL_RCP;
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static const LightInstructionInfo IXOR_R;
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static const LightInstructionInfo IXOR_C;
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static const LightInstructionInfo IROR_R;
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static const LightInstructionInfo IROR_C;
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static const LightInstructionInfo COND_R;
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static const LightInstructionInfo NOP;
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private:
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const char* name_;
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@@ -316,28 +300,31 @@ namespace RandomX {
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: name_(name), type_(-1), latency_(0) {}
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};
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const LightInstructionInfo LightInstructionInfo::IADD_RS = LightInstructionInfo("IADD_RS", LightInstructionType::IADD_RS, MacroOp::Lea_sib, 0);
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const LightInstructionInfo LightInstructionInfo::ISUB_R = LightInstructionInfo("ISUB_R", LightInstructionType::ISUB_R, MacroOp::Sub_rr, 0);
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const LightInstructionInfo LightInstructionInfo::ISUB_C = LightInstructionInfo("ISUB_C", LightInstructionType::ISUB_C, MacroOp::Sub_ri, -1);
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const LightInstructionInfo LightInstructionInfo::IXOR_R = LightInstructionInfo("IXOR_R", LightInstructionType::IXOR_R, MacroOp::Xor_rr, 0);
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const LightInstructionInfo LightInstructionInfo::IADD_RS = LightInstructionInfo("IADD_RS", LightInstructionType::IADD_RS, MacroOp::Lea_sib, 0);
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const LightInstructionInfo LightInstructionInfo::IMUL_R = LightInstructionInfo("IMUL_R", LightInstructionType::IMUL_R, MacroOp::Imul_rr, 0);
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const LightInstructionInfo LightInstructionInfo::IMUL_C = LightInstructionInfo("IMUL_C", LightInstructionType::IMUL_C, MacroOp::Imul_rri, -1);
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const LightInstructionInfo LightInstructionInfo::IROR_C = LightInstructionInfo("IROR_C", LightInstructionType::IROR_C, MacroOp::Ror_ri, -1);
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const LightInstructionInfo LightInstructionInfo::IADD_C7 = LightInstructionInfo("IADD_C7", LightInstructionType::IADD_C7, MacroOp::Add_ri, -1);
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const LightInstructionInfo LightInstructionInfo::IXOR_C7 = LightInstructionInfo("IXOR_C7", LightInstructionType::IXOR_C7, MacroOp::Xor_ri, -1);
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const LightInstructionInfo LightInstructionInfo::IADD_C8 = LightInstructionInfo("IADD_C8", LightInstructionType::IADD_C8, MacroOp::Add_ri, -1);
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const LightInstructionInfo LightInstructionInfo::IXOR_C8 = LightInstructionInfo("IXOR_C8", LightInstructionType::IXOR_C8, MacroOp::Xor_ri, -1);
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const LightInstructionInfo LightInstructionInfo::IADD_C9 = LightInstructionInfo("IADD_C9", LightInstructionType::IADD_C9, MacroOp::Add_ri, -1);
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const LightInstructionInfo LightInstructionInfo::IXOR_C9 = LightInstructionInfo("IXOR_C9", LightInstructionType::IXOR_C9, MacroOp::Xor_ri, -1);
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const LightInstructionInfo LightInstructionInfo::IMULH_R = LightInstructionInfo("IMULH_R", LightInstructionType::IMULH_R, IMULH_R_ops_array, 1, 0, 1);
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const LightInstructionInfo LightInstructionInfo::ISMULH_R = LightInstructionInfo("ISMULH_R", LightInstructionType::ISMULH_R, ISMULH_R_ops_array, 1, 0, 1);
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const LightInstructionInfo LightInstructionInfo::IMUL_RCP = LightInstructionInfo("IMUL_RCP", LightInstructionType::IMUL_RCP, IMUL_RCP_ops_array, 1, 1, -1);
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const LightInstructionInfo LightInstructionInfo::IXOR_R = LightInstructionInfo("IXOR_R", LightInstructionType::IXOR_R, MacroOp::Xor_rr, 0);
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const LightInstructionInfo LightInstructionInfo::IXOR_C = LightInstructionInfo("IXOR_C", LightInstructionType::IXOR_C, MacroOp::Xor_ri, -1);
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const LightInstructionInfo LightInstructionInfo::IROR_R = LightInstructionInfo("IROR_R", LightInstructionType::IROR_R, IROR_R_ops_array, 1, 1, 0);
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const LightInstructionInfo LightInstructionInfo::IROR_C = LightInstructionInfo("IROR_C", LightInstructionType::IROR_C, MacroOp::Ror_ri, -1);
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const LightInstructionInfo LightInstructionInfo::COND_R = LightInstructionInfo("COND_R", LightInstructionType::COND_R, COND_R_ops_array, 5, 5, 3);
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const LightInstructionInfo LightInstructionInfo::NOP = LightInstructionInfo("NOP");
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const int buffer0[] = { 3, 3, 10 };
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const int buffer0[] = { 4, 8, 4 };
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const int buffer1[] = { 7, 3, 3, 3 };
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const int buffer2[] = { 3, 3, 3, 7 };
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const int buffer2[] = { 3, 7, 3, 3 };
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const int buffer3[] = { 4, 9, 3 };
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const int buffer4[] = { 4, 4, 4, 4 };
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const int buffer5[] = { 3, 7, 3, 3 };
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const int buffer6[] = { 3, 3, 7, 3 };
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const int buffer7[] = { 13, 3 };
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const int buffer5[] = { 3, 3, 10 };
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class DecoderBuffer {
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public:
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@@ -360,16 +347,10 @@ namespace RandomX {
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const DecoderBuffer* fetchNext(int instrType, int cycle, int mulCount, Blake2Generator& gen) const {
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if (instrType == LightInstructionType::IMULH_R || instrType == LightInstructionType::ISMULH_R)
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return &decodeBuffer3310; //2-1-1 decode
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if (mulCount < cycle)
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return &decodeBuffer4444_mul;
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if (index_ == 0) {
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return &decodeBuffer4444; //IMUL_RCP end
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}
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/*if (index_ == 2) {
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return &decodeBuffer133; //COND_R middle
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}*/
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if (index_ == 7) {
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return &decodeBuffer7333; //COND_R end
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if (mulCount < cycle + 1)
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return &decodeBuffer4444;
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if (index_ == 5) { //IMUL_RCP end
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return (gen.getByte() & 1) ? &decodeBuffer484 : &decodeBuffer493;
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}
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return fetchNextDefault(gen);
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}
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@@ -379,49 +360,40 @@ namespace RandomX {
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const int* counts_;
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int opsCount_;
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DecoderBuffer() : index_(-1) {}
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static const DecoderBuffer decodeBuffer3310;
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static const DecoderBuffer decodeBuffer484;
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static const DecoderBuffer decodeBuffer7333;
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static const DecoderBuffer decodeBuffer3337;
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static const DecoderBuffer decodeBuffer4444;
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static const DecoderBuffer decodeBuffer4444_mul;
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static const DecoderBuffer decodeBuffer3733;
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static const DecoderBuffer decodeBuffer3373;
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static const DecoderBuffer decodeBuffer133;
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static const DecoderBuffer* decodeBuffers[7];
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static const DecoderBuffer decodeBuffer493;
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static const DecoderBuffer decodeBuffer4444;
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static const DecoderBuffer decodeBuffer3310;
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static const DecoderBuffer* decodeBuffers[4];
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const DecoderBuffer* fetchNextDefault(Blake2Generator& gen) const {
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int select;
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//do {
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select = gen.getByte() & 3;
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//} while (select == 7);
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return decodeBuffers[select];
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return decodeBuffers[gen.getByte() & 3];
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}
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};
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const DecoderBuffer DecoderBuffer::decodeBuffer3310 = DecoderBuffer("3,3,10", 0, buffer0);
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const DecoderBuffer DecoderBuffer::decodeBuffer484 = DecoderBuffer("4,8,4", 0, buffer0);
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const DecoderBuffer DecoderBuffer::decodeBuffer7333 = DecoderBuffer("7,3,3,3", 1, buffer1);
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const DecoderBuffer DecoderBuffer::decodeBuffer3337 = DecoderBuffer("3,3,3,7", 2, buffer2);
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const DecoderBuffer DecoderBuffer::decodeBuffer4444_mul = DecoderBuffer("4,4,4,4-MUL", 3, buffer4);
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const DecoderBuffer DecoderBuffer::decodeBuffer3733 = DecoderBuffer("3,7,3,3", 2, buffer2);
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const DecoderBuffer DecoderBuffer::decodeBuffer493 = DecoderBuffer("4,9,3", 3, buffer3);
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const DecoderBuffer DecoderBuffer::decodeBuffer4444 = DecoderBuffer("4,4,4,4", 4, buffer4);
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const DecoderBuffer DecoderBuffer::decodeBuffer3733 = DecoderBuffer("3,7,3,3", 5, buffer5);
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const DecoderBuffer DecoderBuffer::decodeBuffer3373 = DecoderBuffer("3,3,7,3", 6, buffer6);
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const DecoderBuffer DecoderBuffer::decodeBuffer133 = DecoderBuffer("13,3", 7, buffer7);
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const DecoderBuffer DecoderBuffer::decodeBuffer3310 = DecoderBuffer("3,3,10", 5, buffer5);
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const DecoderBuffer* DecoderBuffer::decodeBuffers[7] = {
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&DecoderBuffer::decodeBuffer3310,
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&DecoderBuffer::decodeBuffer3337,
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const DecoderBuffer* DecoderBuffer::decodeBuffers[4] = {
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&DecoderBuffer::decodeBuffer484,
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&DecoderBuffer::decodeBuffer7333,
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&DecoderBuffer::decodeBuffer3733,
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&DecoderBuffer::decodeBuffer3373,
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&DecoderBuffer::decodeBuffer493,
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};
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const DecoderBuffer DecoderBuffer::Default = DecoderBuffer();
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const LightInstructionInfo* slot_3[] = { &LightInstructionInfo::ISUB_R, &LightInstructionInfo::IXOR_R };
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const LightInstructionInfo* slot_3L[] = { &LightInstructionInfo::ISUB_R, &LightInstructionInfo::IXOR_R, &LightInstructionInfo::IMULH_R, &LightInstructionInfo::ISMULH_R };
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const LightInstructionInfo* slot_3C[] = { &LightInstructionInfo::ISUB_R, &LightInstructionInfo::IXOR_R, &LightInstructionInfo::IROR_R, &LightInstructionInfo::IXOR_R };
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const LightInstructionInfo* slot_4[] = { &LightInstructionInfo::IROR_C, &LightInstructionInfo::IADD_RS };
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const LightInstructionInfo* slot_7[] = { &LightInstructionInfo::IXOR_C, &LightInstructionInfo::ISUB_C };
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const LightInstructionInfo* slot_7L = &LightInstructionInfo::COND_R;
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const LightInstructionInfo* slot_7[] = { &LightInstructionInfo::IXOR_C7, &LightInstructionInfo::IADD_C7 };
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const LightInstructionInfo* slot_8[] = { &LightInstructionInfo::IXOR_C8, &LightInstructionInfo::IADD_C8 };
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const LightInstructionInfo* slot_9[] = { &LightInstructionInfo::IXOR_C9, &LightInstructionInfo::IADD_C9 };
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const LightInstructionInfo* slot_10 = &LightInstructionInfo::IMUL_RCP;
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static bool selectRegister(std::vector<int>& availableRegisters, Blake2Generator& gen, int& reg) {
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@@ -443,7 +415,7 @@ namespace RandomX {
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class LightInstruction {
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public:
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void toInstr(Instruction& instr) {
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instr.opcode = lightInstructionOpcode[getType()];
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instr.opcode = getType();
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instr.dst = dst_;
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instr.src = src_ >= 0 ? src_ : dst_;
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instr.mod = mod_;
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@@ -457,28 +429,22 @@ namespace RandomX {
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if (isLast) {
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return create(slot_3L[gen.getByte() & 3], gen);
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}
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else if (false && isFirst && fetchType == 0) {
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return create(slot_3C[gen.getByte() & 3], gen);
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}
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else {
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return create(slot_3[gen.getByte() & 1], gen);
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}
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case 4:
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if (fetchType == 3 && !isLast) {
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if (fetchType == 4 && !isLast) {
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return create(&LightInstructionInfo::IMUL_R, gen);
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}
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else {
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return create(slot_4[gen.getByte() & 1], gen);
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}
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case 7:
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if (false && isLast) {
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return create(slot_7L, gen);
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}
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if (false && isFirst) {
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return create(&LightInstructionInfo::IMUL_C, gen);
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} else {
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return create(slot_7[gen.getByte() & 1], gen);
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}
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return create(slot_7[gen.getByte() & 1], gen);
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case 8:
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return create(slot_8[gen.getByte() & 1], gen);
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case 9:
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return create(slot_9[gen.getByte() & 1], gen);
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case 10:
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return create(slot_10, gen);
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default:
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@@ -490,13 +456,6 @@ namespace RandomX {
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LightInstruction li(info);
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switch (info->getType())
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{
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case LightInstructionType::IADD_RS: {
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li.mod_ = gen.getByte();
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li.imm32_ = 0;
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li.opGroup_ = LightInstructionType::IADD_RS;
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li.groupParIsSource_ = true;
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} break;
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case LightInstructionType::ISUB_R: {
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li.mod_ = 0;
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li.imm32_ = 0;
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@@ -504,24 +463,51 @@ namespace RandomX {
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li.groupParIsSource_ = true;
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} break;
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case LightInstructionType::ISUB_C: {
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case LightInstructionType::IXOR_R: {
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li.mod_ = 0;
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li.imm32_ = gen.getInt32();
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li.opGroup_ = LightInstructionType::ISUB_C;
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li.opGroupPar_ = -1;
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li.imm32_ = 0;
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li.opGroup_ = LightInstructionType::IXOR_R;
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li.groupParIsSource_ = true;
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} break;
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case LightInstructionType::IADD_RS: {
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li.mod_ = gen.getByte();
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li.imm32_ = 0;
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li.opGroup_ = LightInstructionType::IADD_RS;
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li.groupParIsSource_ = true;
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} break;
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case LightInstructionType::IMUL_R: {
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li.mod_ = 0;
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li.imm32_ = 0;
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li.opGroup_ = LightInstructionType::IMUL_R;
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li.opGroupPar_ = gen.getInt32();
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li.opGroupPar_ = -1; //TODO
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} break;
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case LightInstructionType::IMUL_C: {
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case LightInstructionType::IROR_C: {
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li.mod_ = 0;
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do {
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li.imm32_ = gen.getByte() & 63;
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} while (li.imm32_ == 0);
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li.opGroup_ = LightInstructionType::IROR_C;
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li.opGroupPar_ = -1;
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} break;
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case LightInstructionType::IADD_C7:
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case LightInstructionType::IADD_C8:
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case LightInstructionType::IADD_C9: {
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li.mod_ = 0;
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li.imm32_ = gen.getInt32();
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li.opGroup_ = LightInstructionType::IMUL_C;
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li.opGroup_ = LightInstructionType::IADD_C7;
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li.opGroupPar_ = -1;
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} break;
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case LightInstructionType::IXOR_C7:
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case LightInstructionType::IXOR_C8:
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case LightInstructionType::IXOR_C9: {
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li.mod_ = 0;
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li.imm32_ = gen.getInt32();
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li.opGroup_ = LightInstructionType::IXOR_C7;
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li.opGroupPar_ = -1;
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} break;
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@@ -542,50 +528,14 @@ namespace RandomX {
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} break;
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case LightInstructionType::IMUL_RCP: {
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li.mod_ = 0;
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li.imm32_ = gen.getInt32();
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li.opGroup_ = LightInstructionType::IMUL_C;
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li.opGroupPar_ = -1;
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} break;
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case LightInstructionType::IXOR_R: {
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li.mod_ = 0;
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li.imm32_ = 0;
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li.opGroup_ = LightInstructionType::IXOR_R;
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li.groupParIsSource_ = true;
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} break;
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case LightInstructionType::IXOR_C: {
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li.mod_ = 0;
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li.imm32_ = gen.getInt32();
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li.opGroup_ = LightInstructionType::IXOR_R;
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li.opGroupPar_ = -1;
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} break;
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case LightInstructionType::IROR_R: {
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li.mod_ = 0;
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li.imm32_ = 0;
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li.opGroup_ = LightInstructionType::IROR_R;
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li.opGroupPar_ = -1;
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} break;
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case LightInstructionType::IROR_C: {
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li.mod_ = 0;
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do {
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li.imm32_ = gen.getByte();
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} while ((li.imm32_ & 63) == 0);
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li.opGroup_ = LightInstructionType::IROR_R;
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li.imm32_ = gen.getInt32();
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} while ((li.imm32_ & (li.imm32_ - 1)) == 0);
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li.opGroup_ = LightInstructionType::IMUL_RCP;
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li.opGroupPar_ = -1;
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} break;
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case LightInstructionType::COND_R: {
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li.canReuse_ = true;
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li.mod_ = gen.getByte();
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li.imm32_ = gen.getInt32();
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li.opGroup_ = LightInstructionType::COND_R;
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||||
li.opGroupPar_ = li.imm32_;
|
||||
} break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
@@ -675,8 +625,10 @@ namespace RandomX {
|
||||
constexpr int CYCLE_MAP_SIZE = RANDOMX_LPROG_LATENCY + 3;
|
||||
#ifndef _DEBUG
|
||||
constexpr bool TRACE = false;
|
||||
constexpr bool INFO = false;
|
||||
#else
|
||||
constexpr bool TRACE = true;
|
||||
constexpr bool INFO = true;
|
||||
#endif
|
||||
|
||||
static int blakeCounter = 0;
|
||||
@@ -806,6 +758,7 @@ namespace RandomX {
|
||||
int codeSize = 0;
|
||||
int macroOpCount = 0;
|
||||
int cycle = 0;
|
||||
int fetchCycle = 0;
|
||||
int depCycle = 0;
|
||||
int retireCycle = 0;
|
||||
int mopIndex = 0;
|
||||
@@ -816,7 +769,7 @@ namespace RandomX {
|
||||
constexpr int MAX_ATTEMPTS = 4;
|
||||
|
||||
while(!portsSaturated) {
|
||||
fetchLine = fetchLine->fetchNext(currentInstruction.getType(), cycle, mulCount, gen);
|
||||
fetchLine = fetchLine->fetchNext(currentInstruction.getType(), fetchCycle++, mulCount, gen);
|
||||
if (TRACE) std::cout << "; ------------- fetch cycle " << cycle << " (" << fetchLine->getName() << ")" << std::endl;
|
||||
|
||||
mopIndex = 0;
|
||||
@@ -833,7 +786,6 @@ namespace RandomX {
|
||||
MacroOp& mop = currentInstruction.getInfo().getOp(instrIndex);
|
||||
if (fetchLine->getCounts()[mopIndex] != mop.getSize()) {
|
||||
if (TRACE) std::cout << "ERROR instruction " << mop.getName() << " doesn't fit into slot of size " << fetchLine->getCounts()[mopIndex] << std::endl;
|
||||
return DBL_MIN;
|
||||
}
|
||||
|
||||
if (TRACE) std::cout << mop.getName() << " ";
|
||||
@@ -899,8 +851,8 @@ namespace RandomX {
|
||||
++cycle;
|
||||
}
|
||||
|
||||
std::cout << "; ALU port utilization:" << std::endl;
|
||||
std::cout << "; (* = in use, _ = idle)" << std::endl;
|
||||
if(INFO) std::cout << "; ALU port utilization:" << std::endl;
|
||||
if (INFO) std::cout << "; (* = in use, _ = idle)" << std::endl;
|
||||
|
||||
int portCycles = 0;
|
||||
/*for (int i = 0; i < CYCLE_MAP_SIZE; ++i) {
|
||||
@@ -914,13 +866,13 @@ namespace RandomX {
|
||||
|
||||
double ipc = (macroOpCount / (double)retireCycle);
|
||||
|
||||
std::cout << "; code size " << codeSize << " bytes" << std::endl;
|
||||
std::cout << "; x86 macro-ops: " << macroOpCount << std::endl;
|
||||
std::cout << "; RandomX instructions: " << outIndex << std::endl;
|
||||
std::cout << "; Execution time: " << retireCycle << " cycles" << std::endl;
|
||||
std::cout << "; IPC = " << ipc << std::endl;
|
||||
std::cout << "; Port-cycles: " << portCycles << std::endl;
|
||||
std::cout << "; Multiplications: " << mulCount << std::endl;
|
||||
if (INFO) std::cout << "; code size " << codeSize << " bytes" << std::endl;
|
||||
if (INFO) std::cout << "; x86 macro-ops: " << macroOpCount << std::endl;
|
||||
if (INFO) std::cout << "; RandomX instructions: " << outIndex << std::endl;
|
||||
if (INFO) std::cout << "; Execution time: " << retireCycle << " cycles" << std::endl;
|
||||
if (INFO) std::cout << "; IPC = " << ipc << std::endl;
|
||||
if (INFO) std::cout << "; Port-cycles: " << portCycles << std::endl;
|
||||
if (INFO) std::cout << "; Multiplications: " << mulCount << std::endl;
|
||||
|
||||
int asicLatency[8];
|
||||
memset(asicLatency, 0, sizeof(asicLatency));
|
||||
@@ -942,19 +894,21 @@ namespace RandomX {
|
||||
}
|
||||
}
|
||||
|
||||
std::cout << "; ASIC latency: " << asicLatencyFinal << std::endl;
|
||||
if (INFO) std::cout << "; ASIC latency: " << asicLatencyFinal << std::endl;
|
||||
|
||||
std::cout << "; ASIC latency:" << std::endl;
|
||||
for (int i = 0; i < 8; ++i) {
|
||||
std::cout << "; r" << i << " = " << asicLatency[i] << std::endl;
|
||||
}
|
||||
std::cout << "; CPU latency:" << std::endl;
|
||||
for (int i = 0; i < 8; ++i) {
|
||||
std::cout << "; r" << i << " = " << registers[i].latency << std::endl;
|
||||
if (INFO) {
|
||||
std::cout << "; ASIC latency:" << std::endl;
|
||||
for (int i = 0; i < 8; ++i) {
|
||||
std::cout << "; r" << i << " = " << asicLatency[i] << std::endl;
|
||||
}
|
||||
if (INFO) std::cout << "; CPU latency:" << std::endl;
|
||||
for (int i = 0; i < 8; ++i) {
|
||||
std::cout << "; r" << i << " = " << registers[i].latency << std::endl;
|
||||
}
|
||||
}
|
||||
|
||||
prog.setSize(outIndex);
|
||||
prog.setAddressRegister(addressReg);
|
||||
return addressReg;
|
||||
return outIndex;
|
||||
}
|
||||
}
|
||||
Reference in New Issue
Block a user