mirror of
https://github.com/wownero/RandomWOW.git
synced 2026-10-17 23:41:36 +02:00
Added magic division to JIT compiler
New B operand selection rules
This commit is contained in:
tevador
+159
-52
@@ -17,10 +17,14 @@ You should have received a copy of the GNU General Public License
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along with RandomX. If not, see<http://www.gnu.org/licenses/>.
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*/
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//#define MAGIC_DIVISION
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#include "JitCompilerX86.hpp"
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#include "Pcg32.hpp"
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#include <cstring>
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#include <stdexcept>
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#ifdef MAGIC_DIVISION
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#include "divideByConstantCodegen.h"
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#endif
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#ifdef _WIN32
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#include <windows.h>
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@@ -152,6 +156,17 @@ namespace RandomX {
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instructionOffsets.push_back(codePos);
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emit(0x840fcbff); //dec ebx; jz <epilogue>
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emit(epilogueOffset - (codePos + 4)); //jump offset (RIP-relative)
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auto generator = engine[instr.opcode];
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(this->*generator)(instr, i);
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}
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void JitCompilerX86::fixCallOffsets() {
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for (CallOffset& co : callOffsets) {
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*reinterpret_cast<int32_t*>(code + co.pos) = instructionOffsets[co.index] - (co.pos + 4);
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}
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}
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void JitCompilerX86::gena(Instruction& instr) {
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emit(uint16_t(0x8149)); //xor
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emitByte(0xf0 + (instr.rega % RegistersCount));
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emit(instr.addra);
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@@ -169,41 +184,28 @@ namespace RandomX {
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emit(uint16_t(0x3348));
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emitByte(0xe9); //xor rbp, rcx
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}
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auto generator = engine[instr.opcode];
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(this->*generator)(instr, i);
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}
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void JitCompilerX86::fixCallOffsets() {
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for (CallOffset& co : callOffsets) {
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*reinterpret_cast<int32_t*>(code + co.pos) = instructionOffsets[co.index] - (co.pos + 4);
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emit(uint16_t(0xe181)); //and ecx,
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if (instr.loca & 3) {
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emit(ScratchpadL1 - 1); //first 16 KiB of scratchpad
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}
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else {
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emit(ScratchpadL2 - 1); //whole scratchpad
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}
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}
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void JitCompilerX86::genar(Instruction& instr) {
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emit(uint16_t(0xe181)); //and ecx,
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if (instr.loca & 3) {
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emit(ScratchpadL1 - 1); //first 16 KiB of scratchpad
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}
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else {
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emit(ScratchpadL2 - 1); //whole scratchpad
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}
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gena(instr);
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emit(0xce048b48); //mov rax,QWORD PTR [rsi+rcx*8]
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}
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void JitCompilerX86::genaf(Instruction& instr) {
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emit(uint16_t(0xe181)); //and ecx,
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if (instr.loca & 3) {
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emit(ScratchpadL1 - 1); //first 16 KiB of scratchpad
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}
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else {
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emit(ScratchpadL2 - 1); //whole scratchpad
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}
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gena(instr);
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emitByte(0xf3);
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emit(0xce04e60f); //cvtdq2pd xmm0,QWORD PTR [rsi+rcx*8]
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}
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void JitCompilerX86::genbr0(Instruction& instr, uint16_t opcodeReg, uint16_t opcodeImm) {
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if ((instr.locb & 7) <= 3) {
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void JitCompilerX86::genbiashift(Instruction& instr, uint16_t opcodeReg, uint16_t opcodeImm) {
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if (instr.locb & 1) {
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emit(uint16_t(0x8b49)); //mov
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emitByte(0xc8 + (instr.regb % RegistersCount)); //rcx, regb
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emitByte(0x48); //REX.W
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@@ -216,8 +218,8 @@ namespace RandomX {
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}
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}
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void JitCompilerX86::genbr1(Instruction& instr, uint16_t opcodeReg, uint16_t opcodeImm) {
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if ((instr.locb & 7) <= 5) {
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void JitCompilerX86::genbia(Instruction& instr, uint16_t opcodeReg, uint16_t opcodeImm) {
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if (instr.locb & 3) {
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emit(opcodeReg); // xxx rax, r64
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emitByte(0xc0 + (instr.regb % RegistersCount));
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}
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@@ -227,8 +229,8 @@ namespace RandomX {
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}
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}
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void JitCompilerX86::genbr132(Instruction& instr, uint16_t opcodeReg, uint8_t opcodeImm) {
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if ((instr.locb & 7) <= 5) {
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void JitCompilerX86::genbia32(Instruction& instr, uint16_t opcodeReg, uint8_t opcodeImm) {
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if (instr.locb & 3) {
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emit(opcodeReg); // xxx eax, r32
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emitByte(0xc0 + (instr.regb % RegistersCount));
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}
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@@ -328,25 +330,25 @@ namespace RandomX {
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void JitCompilerX86::h_ADD_64(Instruction& instr, int i) {
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genar(instr);
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genbr1(instr, 0x0349, 0x0548);
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genbia(instr, 0x0349, 0x0548);
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gencr(instr);
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}
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void JitCompilerX86::h_ADD_32(Instruction& instr, int i) {
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genar(instr);
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genbr132(instr, 0x0341, 0x05);
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genbia32(instr, 0x0341, 0x05);
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gencr(instr);
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}
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void JitCompilerX86::h_SUB_64(Instruction& instr, int i) {
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genar(instr);
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genbr1(instr, 0x2b49, 0x2d48);
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genbia(instr, 0x2b49, 0x2d48);
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gencr(instr);
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}
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void JitCompilerX86::h_SUB_32(Instruction& instr, int i) {
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genar(instr);
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genbr132(instr, 0x2b41, 0x2d);
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genbia32(instr, 0x2b41, 0x2d);
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gencr(instr);
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}
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@@ -435,104 +437,209 @@ namespace RandomX {
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void JitCompilerX86::h_DIV_64(Instruction& instr, int i) {
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genar(instr);
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if ((instr.locb & 7) <= 5) {
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if (instr.locb & 3) {
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#ifdef MAGIC_DIVISION
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if (instr.imm32 != 0) {
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uint32_t divisor = instr.imm32;
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if (divisor & (divisor - 1)) {
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magicu_info mi = compute_unsigned_magic_info(divisor, sizeof(uint64_t) * 8);
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if (mi.pre_shift > 0) {
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if (mi.pre_shift == 1) {
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emitByte(0x48);
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emit(uint16_t(0xe8d1)); //shr rax,1
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}
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else {
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emit(0x00e8c148 | (mi.pre_shift << 24)); //shr rax, pre_shift
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}
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}
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if (mi.increment) {
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emit(0x00d8834801c08348); //add rax,1; sbb rax,0
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}
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emit(uint16_t(0xb948)); //movabs rcx, multiplier
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emit(mi.multiplier);
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emit(0x48e1f748); //mul rcx; REX
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emit(uint16_t(0xc28b)); //mov rax,rdx
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if (mi.post_shift > 0)
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emit(0x00e8c148 | (mi.post_shift << 24)); //shr rax, post_shift
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}
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else { //divisor is a power of two
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int shift = 0;
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while (divisor >>= 1)
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++shift;
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if (shift > 0)
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emit(0x00e8c148 | (shift << 24)); //shr rax, shift
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}
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}
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#else
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emitByte(0xb9); //mov ecx, imm32
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emit(instr.imm32 != 0 ? instr.imm32 : 1);
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#endif
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}
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else {
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emitByte(0xb9); //mov ecx, 1
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emit(1);
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emit(uint16_t(0x8b41)); //mov edx, r32
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emitByte(0xd0 + (instr.regb % RegistersCount));
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emit(0x450fd285); //test edx, edx; cmovne ecx,edx
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emitByte(0xca);
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#ifdef MAGIC_DIVISION
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emit(0xf748d233); //xor edx,edx; div rcx
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emitByte(0xf1);
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#endif
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}
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else {
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emitByte(0xb9); //mov ecx, imm32
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emit(instr.imm32 != 0 ? instr.imm32 : 1);
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}
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#ifndef MAGIC_DIVISION
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emit(0xf748d233); //xor edx,edx; div rcx
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emitByte(0xf1);
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#endif
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gencr(instr);
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}
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void JitCompilerX86::h_IDIV_64(Instruction& instr, int i) {
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genar(instr);
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if ((instr.locb & 7) <= 5) {
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emit(uint16_t(0x8b41)); //mov edx, r32
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emitByte(0xd0 + (instr.regb % RegistersCount));
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if (instr.locb & 3) {
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#ifdef MAGIC_DIVISION
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int64_t divisor = instr.imm32;
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if ((divisor & -divisor) == divisor || (divisor & -divisor) == -divisor) {
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// +/- power of two
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bool negative = divisor < 0;
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if (negative)
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divisor = -divisor;
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int shift = 0;
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uint64_t unsignedDivisor = divisor;
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while (unsignedDivisor >>= 1)
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++shift;
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if (shift > 0) {
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emitByte(0x48);
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emit(uint16_t(0xc88b)); //mov rcx, rax
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emit(0x3ff9c148); //sar rcx, 63
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uint32_t mask = (1ULL << shift) - 1;
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emit(uint16_t(0xe181)); //and ecx, mask
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emit(mask);
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emitByte(0x48);
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emit(uint16_t(0xc103)); //add rax, rcx
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emit(0x00f8c148 | (shift << 24)); //sar rax, shift
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}
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if (negative) {
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emitByte(0x48);
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emit(uint16_t(0xd8f7)); //neg rax
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}
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}
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else if (divisor != 0) {
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magics_info mi = compute_signed_magic_info(divisor);
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if ((divisor >= 0) != (mi.multiplier >= 0)) {
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emitByte(0x48);
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emit(uint16_t(0xc88b)); //mov rcx, rax
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}
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emit(uint16_t(0xba48)); //movabs rdx, multiplier
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emit(mi.multiplier);
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emit(0xd233c28b48eaf748); //imul rdx; mov rax,rdx; xor edx,edx
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bool haveSF = false;
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if (divisor > 0 && mi.multiplier < 0) {
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emitByte(0x48);
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emit(uint16_t(0xc103)); //add rax, rcx
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haveSF = true;
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}
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if (divisor < 0 && mi.multiplier > 0) {
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emitByte(0x48);
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emit(uint16_t(0xc12b)); //sub rax, rcx
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haveSF = true;
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}
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if (mi.shift > 0) {
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emit(0x00f8c148 | (mi.shift << 24)); //sar rax, shift
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haveSF = true;
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}
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if (!haveSF) {
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emitByte(0x48);
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emit(uint16_t(0x85c0));
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}
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emit(0x48c2980f); //sets dl; add rax, rdx
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emit(uint16_t(0xc203));
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}
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#else
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emitByte(0xba); // mov edx, imm32
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emit(instr.imm32);
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#endif
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}
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else {
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emitByte(0xba); // xxx edx, imm32
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emit(instr.imm32);
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emit(uint16_t(0x8b41)); //mov edx, r32
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emitByte(0xd0 + (instr.regb % RegistersCount));
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#ifndef MAGIC_DIVISION
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}
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#endif
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emit(0xc88b480b75fffa83);
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emit(0x1274c9ff48c1d148);
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emit(0x0fd28500000001b9);
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emit(0x489948c96348ca45);
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emit(uint16_t(0xf9f7)); //idiv rcx
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#ifdef MAGIC_DIVISION
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}
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#endif
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gencr(instr);
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}
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void JitCompilerX86::h_AND_64(Instruction& instr, int i) {
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genar(instr);
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genbr1(instr, 0x2349, 0x2548);
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genbia(instr, 0x2349, 0x2548);
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gencr(instr);
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}
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void JitCompilerX86::h_AND_32(Instruction& instr, int i) {
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genar(instr);
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genbr132(instr, 0x2341, 0x25);
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genbia32(instr, 0x2341, 0x25);
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gencr(instr);
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}
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void JitCompilerX86::h_OR_64(Instruction& instr, int i) {
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genar(instr);
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genbr1(instr, 0x0b49, 0x0d48);
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genbia(instr, 0x0b49, 0x0d48);
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gencr(instr);
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}
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void JitCompilerX86::h_OR_32(Instruction& instr, int i) {
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genar(instr);
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genbr132(instr, 0x0b41, 0x0d);
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genbia32(instr, 0x0b41, 0x0d);
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gencr(instr);
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}
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void JitCompilerX86::h_XOR_64(Instruction& instr, int i) {
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genar(instr);
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genbr1(instr, 0x3349, 0x3548);
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genbia(instr, 0x3349, 0x3548);
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gencr(instr);
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}
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void JitCompilerX86::h_XOR_32(Instruction& instr, int i) {
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genar(instr);
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genbr132(instr, 0x3341, 0x35);
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genbia32(instr, 0x3341, 0x35);
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gencr(instr);
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}
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void JitCompilerX86::h_SHL_64(Instruction& instr, int i) {
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genar(instr);
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genbr0(instr, 0xe0d3, 0xe0c1);
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genbiashift(instr, 0xe0d3, 0xe0c1);
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gencr(instr);
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}
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void JitCompilerX86::h_SHR_64(Instruction& instr, int i) {
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genar(instr);
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genbr0(instr, 0xe8d3, 0xe8c1);
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genbiashift(instr, 0xe8d3, 0xe8c1);
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gencr(instr);
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}
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void JitCompilerX86::h_SAR_64(Instruction& instr, int i) {
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genar(instr);
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genbr0(instr, 0xf8d3, 0xf8c1);
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genbiashift(instr, 0xf8d3, 0xf8c1);
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gencr(instr);
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}
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void JitCompilerX86::h_ROL_64(Instruction& instr, int i) {
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genar(instr);
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genbr0(instr, 0xc0d3, 0xc0c1);
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genbiashift(instr, 0xc0d3, 0xc0c1);
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gencr(instr);
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}
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void JitCompilerX86::h_ROR_64(Instruction& instr, int i) {
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genar(instr);
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genbr0(instr, 0xc8d3, 0xc8c1);
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genbiashift(instr, 0xc8d3, 0xc8c1);
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gencr(instr);
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}
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