mirror of
https://codeberg.org/wownero/RandomX.git
synced 2026-10-18 05:51:26 +02:00
Unique scratchpad addresses - interpreter
Additional writes to L3
This commit is contained in:
@@ -45,6 +45,8 @@ constexpr bool fpuCheck = false;
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namespace RandomX {
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static int_reg_t Zero = 0;
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template<bool superscalar>
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void InterpretedVirtualMachine<superscalar>::setDataset(dataset_t ds, uint64_t size, SuperscalarProgram(&programs)[RANDOMX_CACHE_ACCESSES]) {
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mem.ds = ds;
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@@ -108,6 +110,12 @@ namespace RandomX {
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return std::fpclassify(x) == FP_SUBNORMAL;
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}
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template<bool superscalar>
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FORCE_INLINE void* InterpretedVirtualMachine<superscalar>::getScratchpadAddress(InstructionByteCode& ibc) {
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uint32_t addr = (*ibc.isrc + ibc.imm) & ibc.memMask;
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return scratchpad + addr;
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}
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template<bool superscalar>
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FORCE_INLINE void InterpretedVirtualMachine<superscalar>::executeBytecode(int& ic, int_reg_t(&r)[8], __m128d (&f)[4], __m128d (&e)[4], __m128d (&a)[4]) {
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auto& ibc = byteCode[ic];
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@@ -120,7 +128,7 @@ namespace RandomX {
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} break;
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case InstructionType::IADD_M: {
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*ibc.idst += load64(scratchpad + (*ibc.isrc & ibc.memMask));
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*ibc.idst += load64(getScratchpadAddress(ibc));
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} break;
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case InstructionType::IADD_RC: {
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@@ -132,7 +140,7 @@ namespace RandomX {
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} break;
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case InstructionType::ISUB_M: {
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*ibc.idst -= load64(scratchpad + (*ibc.isrc & ibc.memMask));
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*ibc.idst -= load64(getScratchpadAddress(ibc));
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} break;
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case InstructionType::IMUL_9C: {
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@@ -144,7 +152,7 @@ namespace RandomX {
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} break;
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case InstructionType::IMUL_M: {
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*ibc.idst *= load64(scratchpad + (*ibc.isrc & ibc.memMask));
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*ibc.idst *= load64(getScratchpadAddress(ibc));
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} break;
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case InstructionType::IMULH_R: {
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@@ -152,7 +160,7 @@ namespace RandomX {
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} break;
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case InstructionType::IMULH_M: {
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*ibc.idst = mulh(*ibc.idst, load64(scratchpad + (*ibc.isrc & ibc.memMask)));
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*ibc.idst = mulh(*ibc.idst, load64(getScratchpadAddress(ibc)));
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} break;
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case InstructionType::ISMULH_R: {
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@@ -160,7 +168,7 @@ namespace RandomX {
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} break;
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case InstructionType::ISMULH_M: {
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*ibc.idst = smulh(unsigned64ToSigned2sCompl(*ibc.idst), unsigned64ToSigned2sCompl(load64(scratchpad + (*ibc.isrc & ibc.memMask))));
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*ibc.idst = smulh(unsigned64ToSigned2sCompl(*ibc.idst), unsigned64ToSigned2sCompl(load64(getScratchpadAddress(ibc))));
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} break;
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case InstructionType::INEG_R: {
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@@ -172,7 +180,7 @@ namespace RandomX {
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} break;
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case InstructionType::IXOR_M: {
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*ibc.idst ^= load64(scratchpad + (*ibc.isrc & ibc.memMask));
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*ibc.idst ^= load64(getScratchpadAddress(ibc));
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} break;
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case InstructionType::IROR_R: {
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@@ -198,7 +206,7 @@ namespace RandomX {
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} break;
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case InstructionType::FADD_M: {
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__m128d fsrc = load_cvt_i32x2(scratchpad + (*ibc.isrc & ibc.memMask));
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__m128d fsrc = load_cvt_i32x2(getScratchpadAddress(ibc));
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*ibc.fdst = _mm_add_pd(*ibc.fdst, fsrc);
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} break;
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@@ -207,7 +215,7 @@ namespace RandomX {
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} break;
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case InstructionType::FSUB_M: {
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__m128d fsrc = load_cvt_i32x2(scratchpad + (*ibc.isrc & ibc.memMask));
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__m128d fsrc = load_cvt_i32x2(getScratchpadAddress(ibc));
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*ibc.fdst = _mm_sub_pd(*ibc.fdst, fsrc);
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} break;
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@@ -221,7 +229,7 @@ namespace RandomX {
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} break;
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case InstructionType::FDIV_M: {
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__m128d fsrc = ieee_set_exponent<-240>(load_cvt_i32x2(scratchpad + (*ibc.isrc & ibc.memMask)));
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__m128d fsrc = ieee_set_exponent<-240>(load_cvt_i32x2(getScratchpadAddress(ibc)));
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*ibc.fdst = _mm_div_pd(*ibc.fdst, fsrc);
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} break;
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@@ -262,7 +270,7 @@ namespace RandomX {
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count_JUMP_not_taken++;
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#endif
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#endif
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*ibc.idst += condition(ibc.condition, load64(scratchpad + (*ibc.isrc & ibc.memMask)), ibc.imm) ? 1 : 0;
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*ibc.idst += condition(ibc.condition, load64(getScratchpadAddress(ibc)), ibc.imm) ? 1 : 0;
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} break;
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case InstructionType::CFROUND: {
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@@ -270,7 +278,7 @@ namespace RandomX {
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} break;
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case InstructionType::ISTORE: {
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store64(scratchpad + (*ibc.idst & ibc.memMask), *ibc.isrc);
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store64(scratchpad + ((*ibc.idst + ibc.imm) & ibc.memMask), *ibc.isrc);
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} break;
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case InstructionType::NOP: {
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@@ -486,7 +494,7 @@ namespace RandomX {
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r[instr.dst] ^= r[instr.src];
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break;
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case RandomX::SuperscalarInstructionType::IADD_RS:
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r[instr.dst] += r[instr.src] << (instr.mod % 4);
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r[instr.dst] += r[instr.src] << instr.getModShift2();
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break;
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case RandomX::SuperscalarInstructionType::IMUL_R:
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r[instr.dst] *= r[instr.src];
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@@ -585,14 +593,14 @@ namespace RandomX {
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auto src = instr.src % RegistersCount;
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ibc.type = InstructionType::IADD_RS;
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ibc.idst = &r[dst];
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if (dst != 5) {
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if (dst != RegisterNeedsDisplacement) {
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ibc.isrc = &r[src];
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ibc.shift = instr.mod % 4;
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ibc.shift = instr.getModShift2();
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ibc.imm = 0;
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}
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else {
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ibc.isrc = &r[src];
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ibc.shift = instr.mod % 4;
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ibc.shift = instr.getModShift2();
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ibc.imm = signExtend2sCompl(instr.getImm32());
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}
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registerUsage[instr.dst] = i;
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@@ -603,13 +611,13 @@ namespace RandomX {
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auto src = instr.src % RegistersCount;
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ibc.type = InstructionType::IADD_M;
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ibc.idst = &r[dst];
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ibc.imm = signExtend2sCompl(instr.getImm32());
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if (instr.src != instr.dst) {
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ibc.isrc = &r[src];
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ibc.memMask = ((instr.mod % 4) ? ScratchpadL1Mask : ScratchpadL2Mask);
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ibc.memMask = (instr.getModMem() ? ScratchpadL1Mask : ScratchpadL2Mask);
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}
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else {
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ibc.imm = instr.getImm32();
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ibc.isrc = &ibc.imm;
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ibc.isrc = &Zero;
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ibc.memMask = ScratchpadL3Mask;
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}
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registerUsage[instr.dst] = i;
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@@ -645,13 +653,13 @@ namespace RandomX {
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auto src = instr.src % RegistersCount;
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ibc.type = InstructionType::ISUB_M;
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ibc.idst = &r[dst];
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ibc.imm = signExtend2sCompl(instr.getImm32());
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if (instr.src != instr.dst) {
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ibc.isrc = &r[src];
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ibc.memMask = ((instr.mod % 4) ? ScratchpadL1Mask : ScratchpadL2Mask);
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ibc.memMask = (instr.getModMem() ? ScratchpadL1Mask : ScratchpadL2Mask);
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}
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else {
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ibc.imm = instr.getImm32();
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ibc.isrc = &ibc.imm;
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ibc.isrc = &Zero;
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ibc.memMask = ScratchpadL3Mask;
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}
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registerUsage[instr.dst] = i;
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@@ -685,13 +693,13 @@ namespace RandomX {
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auto src = instr.src % RegistersCount;
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ibc.type = InstructionType::IMUL_M;
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ibc.idst = &r[dst];
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ibc.imm = signExtend2sCompl(instr.getImm32());
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if (instr.src != instr.dst) {
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ibc.isrc = &r[src];
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ibc.memMask = ((instr.mod % 4) ? ScratchpadL1Mask : ScratchpadL2Mask);
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ibc.memMask = (instr.getModMem() ? ScratchpadL1Mask : ScratchpadL2Mask);
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}
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else {
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ibc.imm = instr.getImm32();
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ibc.isrc = &ibc.imm;
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ibc.isrc = &Zero;
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ibc.memMask = ScratchpadL3Mask;
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}
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registerUsage[instr.dst] = i;
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@@ -711,13 +719,13 @@ namespace RandomX {
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auto src = instr.src % RegistersCount;
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ibc.type = InstructionType::IMULH_M;
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ibc.idst = &r[dst];
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ibc.imm = signExtend2sCompl(instr.getImm32());
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if (instr.src != instr.dst) {
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ibc.isrc = &r[src];
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ibc.memMask = ((instr.mod % 4) ? ScratchpadL1Mask : ScratchpadL2Mask);
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ibc.memMask = (instr.getModMem() ? ScratchpadL1Mask : ScratchpadL2Mask);
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}
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else {
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ibc.imm = instr.getImm32();
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ibc.isrc = &ibc.imm;
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ibc.isrc = &Zero;
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ibc.memMask = ScratchpadL3Mask;
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}
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registerUsage[instr.dst] = i;
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@@ -737,13 +745,13 @@ namespace RandomX {
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auto src = instr.src % RegistersCount;
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ibc.type = InstructionType::ISMULH_M;
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ibc.idst = &r[dst];
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ibc.imm = signExtend2sCompl(instr.getImm32());
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if (instr.src != instr.dst) {
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ibc.isrc = &r[src];
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ibc.memMask = ((instr.mod % 4) ? ScratchpadL1Mask : ScratchpadL2Mask);
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ibc.memMask = (instr.getModMem() ? ScratchpadL1Mask : ScratchpadL2Mask);
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}
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else {
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ibc.imm = instr.getImm32();
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ibc.isrc = &ibc.imm;
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ibc.isrc = &Zero;
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ibc.memMask = ScratchpadL3Mask;
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}
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registerUsage[instr.dst] = i;
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@@ -791,13 +799,13 @@ namespace RandomX {
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auto src = instr.src % RegistersCount;
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ibc.type = InstructionType::IXOR_M;
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ibc.idst = &r[dst];
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ibc.imm = signExtend2sCompl(instr.getImm32());
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if (instr.src != instr.dst) {
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ibc.isrc = &r[src];
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ibc.memMask = ((instr.mod % 4) ? ScratchpadL1Mask : ScratchpadL2Mask);
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ibc.memMask = (instr.getModMem() ? ScratchpadL1Mask : ScratchpadL2Mask);
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}
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else {
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ibc.imm = instr.getImm32();
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ibc.isrc = &ibc.imm;
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ibc.isrc = &Zero;
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ibc.memMask = ScratchpadL3Mask;
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}
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registerUsage[instr.dst] = i;
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@@ -871,7 +879,8 @@ namespace RandomX {
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ibc.type = InstructionType::FADD_M;
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ibc.fdst = &f[dst];
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ibc.isrc = &r[src];
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ibc.memMask = ((instr.mod % 4) ? ScratchpadL1Mask : ScratchpadL2Mask);
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ibc.memMask = (instr.getModMem() ? ScratchpadL1Mask : ScratchpadL2Mask);
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ibc.imm = signExtend2sCompl(instr.getImm32());
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} break;
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CASE_REP(FSUB_R) {
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@@ -888,7 +897,8 @@ namespace RandomX {
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ibc.type = InstructionType::FSUB_M;
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ibc.fdst = &f[dst];
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ibc.isrc = &r[src];
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ibc.memMask = ((instr.mod % 4) ? ScratchpadL1Mask : ScratchpadL2Mask);
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ibc.memMask = (instr.getModMem() ? ScratchpadL1Mask : ScratchpadL2Mask);
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ibc.imm = signExtend2sCompl(instr.getImm32());
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} break;
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CASE_REP(FSCAL_R) {
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@@ -911,7 +921,8 @@ namespace RandomX {
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ibc.type = InstructionType::FDIV_M;
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ibc.fdst = &e[dst];
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ibc.isrc = &r[src];
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ibc.memMask = ((instr.mod % 4) ? ScratchpadL1Mask : ScratchpadL2Mask);
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ibc.memMask = (instr.getModMem() ? ScratchpadL1Mask : ScratchpadL2Mask);
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ibc.imm = signExtend2sCompl(instr.getImm32());
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} break;
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CASE_REP(FSQRT_R) {
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@@ -926,12 +937,12 @@ namespace RandomX {
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ibc.type = InstructionType::COND_R;
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ibc.idst = &r[dst];
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ibc.isrc = &r[src];
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ibc.condition = (instr.mod >> 2) & 7;
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ibc.condition = instr.getModCond();
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ibc.imm = instr.getImm32();
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//jump condition
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int reg = getConditionRegister(registerUsage);
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ibc.target = registerUsage[reg];
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ibc.shift = (instr.mod >> 5);
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ibc.shift = instr.getModShift3();
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ibc.creg = &r[reg];
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for (unsigned j = 0; j < 8; ++j) { //mark all registers as used
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registerUsage[j] = i;
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@@ -944,13 +955,13 @@ namespace RandomX {
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ibc.type = InstructionType::COND_M;
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ibc.idst = &r[dst];
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ibc.isrc = &r[src];
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ibc.condition = (instr.mod >> 2) & 7;
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ibc.condition = instr.getModCond();
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ibc.imm = instr.getImm32();
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ibc.memMask = ((instr.mod % 4) ? ScratchpadL1Mask : ScratchpadL2Mask);
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ibc.memMask = (instr.getModMem() ? ScratchpadL1Mask : ScratchpadL2Mask);
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//jump condition
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int reg = getConditionRegister(registerUsage);
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ibc.target = registerUsage[reg];
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ibc.shift = (instr.mod >> 5);
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ibc.shift = instr.getModShift3();
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ibc.creg = &r[reg];
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for (unsigned j = 0; j < 8; ++j) { //mark all registers as used
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registerUsage[j] = i;
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@@ -970,7 +981,11 @@ namespace RandomX {
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ibc.type = InstructionType::ISTORE;
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ibc.idst = &r[dst];
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ibc.isrc = &r[src];
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ibc.memMask = ((instr.mod % 4) ? ScratchpadL1Mask : ScratchpadL2Mask);
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ibc.imm = signExtend2sCompl(instr.getImm32());
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if (instr.getModCond())
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ibc.memMask = (instr.getModMem() ? ScratchpadL1Mask : ScratchpadL2Mask);
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else
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ibc.memMask = ScratchpadL3Mask;
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} break;
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CASE_REP(NOP) {
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