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https://codeberg.org/wownero/RandomWOW
synced 2026-03-05 14:17:33 -05:00
Code cleanup & refactoring
This commit is contained in:
@@ -27,12 +27,12 @@ along with RandomX. If not, see<http://www.gnu.org/licenses/>.
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namespace randomx {
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static const char* regR[8] = { "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" };
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static const char* regR32[8] = { "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d" };
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static const char* regFE[8] = { "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7" };
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static const char* regF[4] = { "xmm0", "xmm1", "xmm2", "xmm3" };
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static const char* regE[4] = { "xmm4", "xmm5", "xmm6", "xmm7" };
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static const char* regA[4] = { "xmm8", "xmm9", "xmm10", "xmm11" };
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static const char* regR[] = { "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" };
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static const char* regR32[] = { "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d" };
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static const char* regFE[] = { "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7" };
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static const char* regF[] = { "xmm0", "xmm1", "xmm2", "xmm3" };
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static const char* regE[] = { "xmm4", "xmm5", "xmm6", "xmm7" };
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static const char* regA[] = { "xmm8", "xmm9", "xmm10", "xmm11" };
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static const char* tempRegx = "xmm12";
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static const char* mantissaMask = "xmm13";
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@@ -49,7 +49,9 @@ namespace randomx {
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}
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asmCode.str(std::string()); //clear
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for (unsigned i = 0; i < prog.getSize(); ++i) {
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#if RANDOMX_JUMP
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asmCode << "randomx_isn_" << i << ":" << std::endl;
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#endif
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Instruction& instr = prog(i);
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instr.src %= RegistersCount;
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instr.dst %= RegistersCount;
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@@ -469,14 +471,14 @@ namespace randomx {
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}
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void AssemblyGeneratorX86::h_FADD_R(Instruction& instr, int i) {
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instr.dst %= 4;
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instr.src %= 4;
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instr.dst %= RegisterCountFlt;
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instr.src %= RegisterCountFlt;
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asmCode << "\taddpd " << regF[instr.dst] << ", " << regA[instr.src] << std::endl;
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traceflt(instr);
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}
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void AssemblyGeneratorX86::h_FADD_M(Instruction& instr, int i) {
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instr.dst %= 4;
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instr.dst %= RegisterCountFlt;
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genAddressReg(instr);
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asmCode << "\tcvtdq2pd " << tempRegx << ", qword ptr [" << regScratchpadAddr << "+rax]" << std::endl;
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asmCode << "\taddpd " << regF[instr.dst] << ", " << tempRegx << std::endl;
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@@ -484,14 +486,14 @@ namespace randomx {
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}
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void AssemblyGeneratorX86::h_FSUB_R(Instruction& instr, int i) {
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instr.dst %= 4;
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instr.src %= 4;
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instr.dst %= RegisterCountFlt;
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instr.src %= RegisterCountFlt;
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asmCode << "\tsubpd " << regF[instr.dst] << ", " << regA[instr.src] << std::endl;
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traceflt(instr);
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}
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void AssemblyGeneratorX86::h_FSUB_M(Instruction& instr, int i) {
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instr.dst %= 4;
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instr.dst %= RegisterCountFlt;
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genAddressReg(instr);
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asmCode << "\tcvtdq2pd " << tempRegx << ", qword ptr [" << regScratchpadAddr << "+rax]" << std::endl;
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asmCode << "\tsubpd " << regF[instr.dst] << ", " << tempRegx << std::endl;
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@@ -499,20 +501,20 @@ namespace randomx {
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}
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void AssemblyGeneratorX86::h_FSCAL_R(Instruction& instr, int i) {
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instr.dst %= 4;
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instr.dst %= RegisterCountFlt;
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asmCode << "\txorps " << regF[instr.dst] << ", " << scaleMask << std::endl;
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traceflt(instr);
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}
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void AssemblyGeneratorX86::h_FMUL_R(Instruction& instr, int i) {
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instr.dst %= 4;
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instr.src %= 4;
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instr.dst %= RegisterCountFlt;
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instr.src %= RegisterCountFlt;
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asmCode << "\tmulpd " << regE[instr.dst] << ", " << regA[instr.src] << std::endl;
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traceflt(instr);
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}
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void AssemblyGeneratorX86::h_FDIV_M(Instruction& instr, int i) {
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instr.dst %= 4;
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instr.dst %= RegisterCountFlt;
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genAddressReg(instr);
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asmCode << "\tcvtdq2pd " << tempRegx << ", qword ptr [" << regScratchpadAddr << "+rax]" << std::endl;
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asmCode << "\tandps " << tempRegx << ", " << mantissaMask << std::endl;
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@@ -522,7 +524,7 @@ namespace randomx {
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}
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void AssemblyGeneratorX86::h_FSQRT_R(Instruction& instr, int i) {
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instr.dst %= 4;
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instr.dst %= RegisterCountFlt;
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asmCode << "\tsqrtpd " << regE[instr.dst] << ", " << regE[instr.dst] << std::endl;
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traceflt(instr);
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}
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@@ -566,7 +568,7 @@ namespace randomx {
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void AssemblyGeneratorX86::handleCondition(Instruction& instr, int i) {
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const int shift = instr.getModShift();
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const int conditionMask = ((1 << RANDOMX_CONDITION_BITS) - 1) << shift;
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const int conditionMask = ((1 << RANDOMX_JUMP_BITS) - 1) << shift;
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int reg = getConditionRegister();
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int target = registerUsage[reg] + 1;
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registerUsage[reg] = i;
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@@ -579,7 +581,9 @@ namespace randomx {
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}
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void AssemblyGeneratorX86::h_COND_R(Instruction& instr, int i) {
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#if RANDOMX_JUMP
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handleCondition(instr, i);
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#endif
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asmCode << "\txor ecx, ecx" << std::endl;
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asmCode << "\tcmp " << regR32[instr.src] << ", " << (int32_t)instr.getImm32() << std::endl;
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asmCode << "\tset" << condition(instr) << " cl" << std::endl;
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@@ -602,7 +606,6 @@ namespace randomx {
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#define INST_HANDLE(x) REPN(&AssemblyGeneratorX86::h_##x, WT(x))
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InstructionGenerator AssemblyGeneratorX86::engine[256] = {
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//Integer
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INST_HANDLE(IADD_RS)
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INST_HANDLE(IADD_M)
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INST_HANDLE(ISUB_R)
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@@ -620,27 +623,18 @@ namespace randomx {
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INST_HANDLE(IROR_R)
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INST_HANDLE(IROL_R)
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INST_HANDLE(ISWAP_R)
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//Common floating point
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INST_HANDLE(FSWAP_R)
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//Floating point group F
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INST_HANDLE(FADD_R)
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INST_HANDLE(FADD_M)
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INST_HANDLE(FSUB_R)
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INST_HANDLE(FSUB_M)
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INST_HANDLE(FSCAL_R)
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//Floating point group E
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INST_HANDLE(FMUL_R)
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INST_HANDLE(FDIV_M)
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INST_HANDLE(FSQRT_R)
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//Control
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INST_HANDLE(COND_R)
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INST_HANDLE(CFROUND)
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INST_HANDLE(ISTORE)
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INST_HANDLE(NOP)
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};
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}
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